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  1. POWER-DELAY EFFICIENT ASYNCHRONOUS DESIGN APPROACH USING GALEOR
  2. Design of Area, Power and Delay Efficient High-Speed Multipliers
  3. Design of Area-Delay-Power Efficient Adaptive Filter using Wallace Tree Multiplier
  4. A LOW POWER BASED ASYNCHRONOUS CIRCUIT DESIGN USING POWER GATED LOGIC
  5. A review: Area, Power and Delay Efficient Multipliers
  6. Area-Delay-Power Efficient Carry-Select Adder
  7. Asynchronous FPGA Cell?s Design with Autonomous Power Gating and LEDR Encoding
  8. REVIEW OF DELAY AND POWER EFFICIENT CARRY SELECT ADDER USING PIPELINE
  9. REVIEW OF DELAY AND POWER EFFICIENT CARRY SELECT ADDER USING PIPELINE
  10. Implementation of Fixed-Point LMS Adaptive Filter with Efficient Area-Power-Delay