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  1. LOW POWER BARREL SHIFTER DESIGN USING COMPLEMENTARY AND PSEUDO NMOS LOGIC
  2. Design and Implementation of Ternary Bidirectional Barrel Shifter Using Multi-Valued Reversible Logic
  3. VLSI Design of Low Power Reversible 8-bit Barrel Shifter
  4. Review Paper on Area Efficient Vedic Multiplier using Barrel Shifter
  5. Review Paper on Area Efficient Vedic Multiplier using Barrel Shifter
  6. Design of CMOS Current Comparator FVF with VF Level Shifter using for Low Power Applications
  7. Design of Arithmetic Logic Unit Using Complementary Metal Oxide Semiconductor Galois Field
  8. A LOW POWER BASED ASYNCHRONOUS CIRCUIT DESIGN USING POWER GATED LOGIC
  9. A Power Efficient Design of Reversible RAM Using Pseudo Reed-Muller Expression
  10. A Novel Design of Low Power 4:2 Compressor using Adiabatic Logic